-
2
-
-
0038636195
-
Derivation of optimum tests to detect faults in combinational circuits
-
Apr.
-
J. F. Poage, “Derivation of optimum tests to detect faults in combinational circuits,” in Proc. Symp. Mathematical Theory of Automata, Apr. 1962, pp. 483–528.
-
(1962)
Proc. Symp. Mathematical Theory of Automata
, pp. 483-528
-
-
Poage, J.F.1
-
3
-
-
84938006460
-
Fault testing and diagnosis in combinational digital circuits
-
Apr.
-
W. H. Kautz, “Fault testing and diagnosis in combinational digital circuits,” IEEE Trans. Comput., vol. C-17, pp. 352–367, Apr. 1968.
-
(1968)
IEEE Trans. Comput.
, vol.C-17
, pp. 352-367
-
-
Kautz, W.H.1
-
4
-
-
84937998861
-
On finding a nearly minimal set of fault detection tests for combinational logic nets
-
Feb.
-
D. B. Armstrong, “On finding a nearly minimal set of fault detection tests for combinational logic nets,” IEEE Trans. Electron. Comput., vol. EC-15, pp. 66–73, Feb. 1966.
-
(1966)
IEEE Trans. Electron. Comput.
, vol.EC-15
, pp. 66-73
-
-
Armstrong, D.B.1
-
5
-
-
84885620357
-
An algorithm for selecting an optimum set of diagnostic tests
-
Oct.
-
H. Y. Chang, “An algorithm for selecting an optimum set of diagnostic tests,” IEEE Trans. Electron. Comput., vol. EC-14, pp. 706–711, Oct. 1965.
-
(1965)
IEEE Trans. Electron. Comput.
, vol.EC-14
, pp. 706-711
-
-
Chang, H.Y.1
-
6
-
-
34047190604
-
A distinguishability criterion for selecting efficient diagnostic tests
-
Washington, D. C.: Thompson
-
-, “A distinguishability criterion for selecting efficient diagnostic tests,” in 1968 Spring Joint Comput. Conf., AFIPS Conf. Proc., vol. 32. Washington, D. C.: Thompson, 1968, pp. 529–534.
-
(1968)
1968 Spring Joint Comput. Conf., AFIPS Conf. Proc.
, vol.32
, pp. 529-534
-
-
-
7
-
-
0142017250
-
Techniques for the diagnosis of switching circuit failures
-
Sept.
-
J. M. Galey, R. E. Norby, and J. P. Roth, “Techniques for the diagnosis of switching circuit failures,” IEEE Trans. Commun. Electron., vol. 83, pp. 509–514, Sept. 1964.
-
(1964)
IEEE Trans. Commun. Electron.
, vol.83
, pp. 509-514
-
-
Galey, J.M.1
Norby, R.E.2
Roth, J.P.3
-
8
-
-
84911547644
-
Programmed algorithms to compute tests to detect and distinguish between failures in logic circuits
-
Oct.
-
J. P. Roth, W. G. Bouricius, and P. R. Schneider, “Programmed algorithms to compute tests to detect and distinguish between failures in logic circuits,” IEEE Trans. Electron. Comput., vol. EC-16, pp. 567–580, Oct. 1967.
-
(1967)
IEEE Trans. Electron. Comput.
, vol.EC-16
, pp. 567-580
-
-
Roth, J.P.1
Bouricius, W.G.2
Schneider, P.R.3
-
10
-
-
0015284302
-
Multiple fault detection in combinational networks
-
Jan.
-
J. W. Gault, J. P. Robinson, and S. M. Reddy, “Multiple fault detection in combinational networks,” IEEE Trans. Comput., vol. C-21, pp. 31–36, Jan. 1972.
-
(1972)
IEEE Trans. Comput.
, vol.C-21
, pp. 31-36
-
-
Gault, J.W.1
Robinson, J.P.2
Reddy, S.M.3
-
12
-
-
84909503950
-
Design of sequential machines with fault-detection capabilities
-
Aug.
-
Z. Kohavi and P. Lavallee, “Design of sequential machines with fault-detection capabilities,” IEEE Trans. Electron. Comput., vol. EC-16, pp. 473–484, Aug. 1967.
-
(1967)
IEEE Trans. Electron. Comput.
, vol.EC-16
, pp. 473-484
-
-
Kohavi, Z.1
Lavallee, P.2
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