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Volumn C-21, Issue 6, 1972, Pages 556-568

Detection of Multiple Faults in Combinational Logic Networks

Author keywords

Combinational logic; diagnosis; fault detection; faults; multiple; test equivalence; testing

Indexed keywords


EID: 0008055838     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.1972.5009008     Document Type: Article
Times cited : (51)

References (12)
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  • 3
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    • Fault testing and diagnosis in combinational digital circuits
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    • (1968) IEEE Trans. Comput. , vol.C-17 , pp. 352-367
    • Kautz, W.H.1
  • 4
    • 84937998861 scopus 로고
    • On finding a nearly minimal set of fault detection tests for combinational logic nets
    • Feb.
    • D. B. Armstrong, “On finding a nearly minimal set of fault detection tests for combinational logic nets,” IEEE Trans. Electron. Comput., vol. EC-15, pp. 66–73, Feb. 1966.
    • (1966) IEEE Trans. Electron. Comput. , vol.EC-15 , pp. 66-73
    • Armstrong, D.B.1
  • 5
    • 84885620357 scopus 로고
    • An algorithm for selecting an optimum set of diagnostic tests
    • Oct.
    • H. Y. Chang, “An algorithm for selecting an optimum set of diagnostic tests,” IEEE Trans. Electron. Comput., vol. EC-14, pp. 706–711, Oct. 1965.
    • (1965) IEEE Trans. Electron. Comput. , vol.EC-14 , pp. 706-711
    • Chang, H.Y.1
  • 6
    • 34047190604 scopus 로고
    • A distinguishability criterion for selecting efficient diagnostic tests
    • Washington, D. C.: Thompson
    • -, “A distinguishability criterion for selecting efficient diagnostic tests,” in 1968 Spring Joint Comput. Conf., AFIPS Conf. Proc., vol. 32. Washington, D. C.: Thompson, 1968, pp. 529–534.
    • (1968) 1968 Spring Joint Comput. Conf., AFIPS Conf. Proc. , vol.32 , pp. 529-534
  • 7
    • 0142017250 scopus 로고
    • Techniques for the diagnosis of switching circuit failures
    • Sept.
    • J. M. Galey, R. E. Norby, and J. P. Roth, “Techniques for the diagnosis of switching circuit failures,” IEEE Trans. Commun. Electron., vol. 83, pp. 509–514, Sept. 1964.
    • (1964) IEEE Trans. Commun. Electron. , vol.83 , pp. 509-514
    • Galey, J.M.1    Norby, R.E.2    Roth, J.P.3
  • 8
    • 84911547644 scopus 로고
    • Programmed algorithms to compute tests to detect and distinguish between failures in logic circuits
    • Oct.
    • J. P. Roth, W. G. Bouricius, and P. R. Schneider, “Programmed algorithms to compute tests to detect and distinguish between failures in logic circuits,” IEEE Trans. Electron. Comput., vol. EC-16, pp. 567–580, Oct. 1967.
    • (1967) IEEE Trans. Electron. Comput. , vol.EC-16 , pp. 567-580
    • Roth, J.P.1    Bouricius, W.G.2    Schneider, P.R.3
  • 10
    • 0015284302 scopus 로고
    • Multiple fault detection in combinational networks
    • Jan.
    • J. W. Gault, J. P. Robinson, and S. M. Reddy, “Multiple fault detection in combinational networks,” IEEE Trans. Comput., vol. C-21, pp. 31–36, Jan. 1972.
    • (1972) IEEE Trans. Comput. , vol.C-21 , pp. 31-36
    • Gault, J.W.1    Robinson, J.P.2    Reddy, S.M.3
  • 12
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    • Design of sequential machines with fault-detection capabilities
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    • Z. Kohavi and P. Lavallee, “Design of sequential machines with fault-detection capabilities,” IEEE Trans. Electron. Comput., vol. EC-16, pp. 473–484, Aug. 1967.
    • (1967) IEEE Trans. Electron. Comput. , vol.EC-16 , pp. 473-484
    • Kohavi, Z.1    Lavallee, P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.