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Volumn 70, Issue 3, 1996, Pages 247-266

Single machine scheduling subject to precedence delays

Author keywords

Complexity; Delivery time; Makespan; Optimal algorithm; Precedence delay; Release time; Scheduling

Indexed keywords


EID: 0007736539     PISSN: 0166218X     EISSN: None     Source Type: Journal    
DOI: 10.1016/0166-218X(96)00110-2     Document Type: Article
Times cited : (32)

References (18)
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    • A modified shifting bottleneck procedure for job-shop scheduling
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    • Dauzère-Peres, S.1    Lasserre, J.B.2
  • 7
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    • Integration of lotsizing and scheduling decisions in a job-shop
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  • 8
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    • Dileepan, P.1    Sen, T.2
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    • Finta, L.1    Liu, Z.2
  • 11
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    • Scheduling unit-time tasks with arbitrary release times and deadlines
    • M.R. Garey, D.R. Johnson, B.B. Simons and R.E. Tarjan, Scheduling unit-time tasks with arbitrary release times and deadlines, SIAM J. Comput. 10 (1981) 256-269.
    • (1981) SIAM J. Comput. , vol.10 , pp. 256-269
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    • Multiprocessor scheduling with communication delays
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    • Veltman, B.1    Lageweg, B.J.2    Lenstra, J.K.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.