The filter cache: A run-time cache management approach

Conference Proceedings of the EUROMICRO

Volumn 1, Issue , 1999, Pages 424-431

  Sahuquillo, Julio ^a   Pont, Ana ^a  

^a UNIVERSITAT POLITÈCNICA DE VALÈNCIA   (Spain)

Author keywords

data cache management; data locality; memory architectures; multi lateral cache; multiprocessor systems

Indexed keywords

CACHE ORGANIZATION; CURRENT PROCESSORS; DATA CACHES; DATA LOCALITY; MICRO ARCHITECTURES; MULTI PROCESSOR SYSTEMS; MULTI-LATERAL CACHE; UNIPROCESSOR SYSTEMS;

ASPECT RATIO; CACHE MEMORY; COMPUTER ARCHITECTURE; INFORMATION SCIENCE; MEMORY ARCHITECTURE;

INFORMATION MANAGEMENT;

EID: 0006704780     PISSN: 10896503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EURMIC.1999.794504     Document Type: Conference Paper

References (17)

1. G. Tyson, M. Farrens, J. Matthews, and A.R. Pleszkun, "A Modified Approach to Data Cache Management," Proceedings of the Micro-28, December 1995.
2. T. Johnson and W.W. Whu, "Run-time Adaptative Cache Hierarchy Management via Reference Analysis," Proceedings of the ISCA-24, June 1997.
3. N. Jouppi, "Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers," Proceedings of the ISCA-17, June 1990.
4. A. González, Carlos Aliaga, and M. Valero, "A Data Cache with Multiple Caching Strategies Tuned to Different Types of Locality," Proceedings of the ACM International Conference on Supercomputing, Barcelona, Spain 1995, pp. 338-347.
5. V. Milutinovic, B. Markovic, M. Tomasevic, and M. Tremblay, "The Split Temporal/Spatial Cache: Initial Performance Analysis," Proceedings of the SCIzzL-5, Santa Clara, California, USA, March 1996.
6. J.A. Rivers and E.S. Davidson, "Reducing Conflicts in Direct-Mapped Caches with a Temporality-Based Design," Proceedings of the 1966 ICPP, August 1996.
7. M. Prvulovic, D. Marinov and V. Milutinovic, "Performance Evaluation of Split Temporal/Spatial Caches: Paving the Way to New Solutions," Proceedings of the Workshop Digest of ISCA/PAID-98, Barcelona, Spain, June 1998.
8. J. Sahuquillo and A. Pont, "The Split Data Cache in Multiprocessors Systems: an Initial Hit Ratio Analysis," Proceedings of the 7th Euromicro Workshop on Parallel and Distributed Processing, Madeira, Portugal, February 1999.
9. K.K. Chan, C.C. Hay, J.R. Keller, G.P. Kurpanek, F.X. Schumacher, J. Zheng, "Design of the HP PA 7200 CPU," Hewlet-Packard Journal, February 1996.
10. R.G. Sheldon, "Implementing a Cache Consistency Protocol," Proceedings of the 12th ISCA, 1985.
11. S. C. Woo, M. Ohara, E. Torrie, J. P. Singh, and A. Gupta, "The SPLASH-2 Programs: Characterization and Methodological Considerations," Proceedings of the 22nd ISCA, June 1995.
12. D. Magdic, "Limes: A Multiprocessor Simulation Environment," IEEE TCCA Newsletter, March 1997.
13. J. Sahuquillo and A. Pont, "Impact of Reducing Miss Write Latencies in Multiprocessors with Two Level Cache," Proceedings of the 24th Euromicro Conference, Vasteras, Sweden, August 1998.
14. S. Kumar and C. Wilkerson, "Exploiting Spatial Locality in Data Caches using Spatial Footprints," Proceedings of the 25nd ISCA, June 1998.
15. M. Tomasko, S. Hadjiyiannis, and W. A. Najjar, "Experimental Evaluation of Array Caches," IEEE TCCA NEWSLETTERS, March 97.
16. V. Milutinovic, B. Markovic, M. Tomasevic, and M. Tremblay, "The Split Temporal/Spatial Cache: Initial Complexity Analysis", Proceedings of the SCIzzL-6, Santa Clara, California, USA, September 1996.
17. E.S.Tam, J.A. Rivers, V. Srinivasan, G.S. Tyson, and E.S. Davidson, "Evaluating the Performance of Active Cache Management Schemes," Proceedings of the ICCD, Texas, USA, October 98.