On a graph-theoretical model for cyclic register allocation

Discrete Applied Mathematics

Volumn 93, Issue 2-3, 1999, Pages 191-203

  De Werra, D ^c   Eisenbeis, Ch ^a   Lelait, S ^c   Marmol, B ^b  

^a INRIA ROCQUENCOURT   (France)

^b INRIA RHÔNE ALPES   (France)

^c NONE

Author keywords

Circular arc graphs; Coloring; Compilation; Cyclic scheduling; Microprocessor design; Register allocation

Indexed keywords

EID: 0006632542     PISSN: 0166218X     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0166-218X(99)00105-5     Document Type: Article

References (8)

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