Processor modeling and code selection for retargetable compilation

ACM Transactions on Design Automation of Electronic Systems

Volumn 6, Issue 3, 2001, Pages 277-307

  Van Praet, J ^a   Lanneer, D ^a   Geurts, W ^a   Goossens, G ^a  

^a Target Compiler Technologies   (Belgium)

Author keywords

Code selection; Embedded systems; Graph; Instruction set graph; Processor modeling; Retargetable code generation; Retargetable compilation; System design

Indexed keywords

EID: 0005631775     PISSN: 10844309     EISSN: None     Source Type: Journal    
DOI: 10.1145/383251.383252     Document Type: Article

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