High-level synthesis with SDRAMs and RAMBUS DRAMs

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E82-A, Issue 11, 1999, Pages 2347-2355

  Khare, Asheesh ^a   Panda, Preeti R ^a   Dutt, Nikil D ^a   Nicolau, Alexandru ^a  

^a SYNOPSYS INC   (United States)

Author keywords

Access modes; CDFG; Multiple banks; Scheduling; SDRAM

Indexed keywords

EID: 0005408820     PISSN: 09168508     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (16)

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