SCFL static frequency divider using InAIAs/InGaAs/InP HEMTs

1995 25th European Microwave Conference

Volumn 1, Issue , 1995, Pages 222-228

  Umeda, Yohtaro ^a   Osafune, Kazuo ^a   Enoki, Takatomo ^a   Ito, Hiroshi ^a   Ishii, Yasunobu ^a  

^a NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

FREQUENCY DIVIDING CIRCUITS; HIGH ELECTRON MOBILITY TRANSISTORS; SEMICONDUCTING INDIUM PHOSPHIDE;

COMPARATIVE STUDIES; DELAY TIME ANALYSIS; INTERCONNECTION LINES; INTRINSIC GATE DELAY; PROPAGATION DELAY TIME; STATIC FREQUENCY DIVIDERS; TRANSMISSION DELAYS; TRAVELLING WAVE EFFECTS;

DELAY CIRCUITS;

EID: 0005356888     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EUMA.1995.336950     Document Type: Conference Paper

References (5)

1. M. Tokumitsu, K. Onodera, H. Sutoh and K. Asai, "A 31 GHz Static Frequency Divider Using Au/WSiN gate GaAs MESFETs", 1991, IEICE Trans., vol. 74, no. 12, pp. 4136-4140.
2. A. Masaki and T. Chiba, "Design Aspects of VLSI for Computer Logic", 1982, IEEE J. Solid-State Circuits, vol. SC-17, no. 2, pp. 381-386.
3. T. Enoki, H. Ito, K. Ikuta and Y. Ishii, 0.1-mm InAIAs/lnGaAs HEMTs with an InP-recess-etch stopper grown by MOCVD", 1995, IEEE 7th Int. Conf. on InP and Related Materials, Sapporo, Japan, pp. 81-84.
4. T. Sakurai, "Double Word line and Bit Structure for VLSI RAMs", 1983, 15th Conf. Solid State Devices and Materials, Tokyo, Japan, pp. 269-272.
5. T. A. Schreyer, Y. Nishii and K. C. Saraswat, "A Complete RLC Transmission Line Model of Interconnect Delay", 1988, Proc. IEEE Symp. on VLSI Tech., pp. 95-96.