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Journal of Japan Institute of Electronics Packaging
Volumn 3, Issue 2, 2000, Pages 103-107
The Review of Micro-Interconnection Technology
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[No Author keywords available]
Indexed keywords

EID: 0003691023     PISSN: 13439677     EISSN: 1884121X     Source Type: Journal    
DOI: 10.5104/jiep.3.103     Document Type: Article
Times cited : (1)
References (7)
  • 1
    • 85053890224 scopus 로고    scopus 로고
    • The National Technology Roadmap for Semiconductors
    • “The National Technology Roadmap for Semiconductors”, SIA, p.136, 1997.
    • (1997) SIA , pp. 136
  • 3
  • 4
    • 85024449109 scopus 로고
    • MicroSMTTM: CHIP SCALE PACKAGING FOR INTEGRATED CIRCUITS
    • Inc. TECHNICAL WHITE PAPER
    • “MicroSMTTM: CHIP SCALE PACKAGING FOR INTEGRATED CIRCUITS”, ChipScale, Inc. TECHNICAL WHITE PAPER. 1995.
    • (1995) ChipScale
  • 5
    • 0242555164 scopus 로고
    • Surface Laminar Circuit and Flip Chip Attach Packaging
    • June
    • Y. Tsukada et al.: “Surface Laminar Circuit and Flip Chip Attach Packaging”, Proc. of 7th IMC, p.252, June, 1992.
    • (1992) Proc. of 7th IMC , pp. 252
    • Tsukada, Y.1
  • 6
    • 84898023270 scopus 로고
    • Fabrication and Assembly Processes for Solderless Flip Chip Assemblies
    • Oct.
    • R.H. Estes: “Fabrication and Assembly Processes for Solderless Flip Chip Assemblies”, Proc. of '92 ISHM, p.322, Oct., 1992.
    • (1992) Proc. of '92 ISHM , pp. 322
    • Estes, R.H.1
  • 7
    • 33748649110 scopus 로고
    • Chip-On-Glass Technology Using Conductive Particles and Light-Setting Adhesives
    • May
    • H. Atarashi et al. : “Chip-On-Glass Technology Using Conductive Particles and Light-Setting Adhesives”, Proc of 6th IMC, p. 190, May, 1990.
    • (1990) Proc of 6th IMC , pp. 190
    • Atarashi, H.1

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.