Design of an efficient FFT processor for DAB system

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 4, Issue , 2001, Pages 654-657

  Lo, Hsin Fu ^a   Shieh, Ming Der ^a   Wu, Chien Ming ^a  

^a NATIONAL YUNLIN UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BUTTERFLY ARCHITECTURES; BUTTERFLY UNIT; FFT PROCESSORS; HIGH RADIX; MEMORY BANDWIDTHS; MEMORY STRUCTURE; MEMORY UNITS; UNIFIED APPROACH;

FAST FOURIER TRANSFORMS;

EID: 0003373060     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.922322     Document Type: Conference Paper

References (10)

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