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Volumn C-36, Issue 10, 1987, Pages 1144-1152

A Way to Build Efficient Carry-Skip Adders

Author keywords

Carry skip adders; VLSI design

Indexed keywords


EID: 0003290827     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.1987.1676855     Document Type: Article
Times cited : (72)

References (16)
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    • Review of high speed addition techniques
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    • J.B. Gosling, “Review of high speed addition techniques,” Proc. IEEE, vol. 118, pp. 29–35, Jan. 1971.
    • (1971) Proc. IEEE , vol.118 , pp. 29-35
    • Gosling, J.B.1
  • 8
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    • A comparative study of propagation speedup circuits in binary arithmetic units
    • Amsterdam, The Netherlands: Elsevier-North Holland
    • M. Lehman, “A comparative study of propagation speedup circuits in binary arithmetic units,” in Information Processing. Amsterdam, The Netherlands: Elsevier-North Holland, 1963, p. 671.
    • (1963) Information Processing , pp. 671
    • Lehman, M.1
  • 9
    • 84937351672 scopus 로고
    • Skip techniques for highspeed carry propagation in binary arithmetic units
    • Dec.
    • M. Lehman and N. Burla, “Skip techniques for highspeed carry propagation in binary arithmetic units,” IRE Trans. Electron. Comput., p. 691, Dec. 1961.
    • (1961) IRE Trans. Electron. Comput. , pp. 691
    • Lehman, M.1    Burla, N.2
  • 10
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    • On determination of optimal distributions of carry skips in adders
    • Feb.
    • S. Majerski, “On determination of optimal distributions of carry skips in adders,” IEEE Trans. Electron. Comput., vol. EC-16, Feb. 1967.
    • (1967) IEEE Trans. Electron. Comput. , vol.16 EC
    • Majerski, S.1
  • 12
    • 0020877019 scopus 로고
    • A comparison of ALU structures for VLSI technology
    • Aarhus University, Aarhus, Denmark, June
    • S. Ong and D.E. Atkins, “A comparison of ALU structures for VLSI technology,” in Proc. 6th Symp. Comput. Arithmetic, Aarhus University, Aarhus, Denmark, June 1983.
    • (1983) Proc. 6th Symp. Comput. Arithmetic
    • Ong, S.1    Atkins, D.E.2
  • 13
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    • A 32 bit execution unit in an advanced NMOS technology
    • June
    • M. Pomper et al., “A 32 bit execution unit in an advanced NMOS technology,” IEEE J. SolidState Circuits, vol. SC-17, June 1982.
    • (1982) IEEE J. SolidState Circuits , vol.17 SC
    • Pomper, M.1
  • 14
    • 0020933420 scopus 로고
    • Lubrick: A silicon assembler and its application to data-path design for FISCA
    • G. Anceau and E.J. Aas, Eds. Amsterdam, The Netherlands: Elsevier Science, IFIP
    • J.P. Schoellkopf, “Lubrick: A silicon assembler and its application to data-path design for FISCA,” in Proc. VSLI′83, G. Anceau and E.J. Aas, Eds. Amsterdam, The Netherlands: Elsevier Science, IFIP, 1983, pp. 435–445.
    • (1983) Proc. VSLI′83 , pp. 435-445
    • Schoellkopf, J.P.1
  • 16
    • 0003400983 scopus 로고
    • Reading, MA: Addison-Wesley, 1152 ieee transactions on computers, vol. c-36, no. 10, october 1987 Bertrand Hochet was born in France in 1961. He received the Engineer degree from Ecole Nationale Supèrieure d'Electronique et de Radioélectricité de Grenoble, Grenoble, France, in 1984, and the Ph.D. degree from Institut National Polytechnique de Grenoble, Grenoble, France, in January 1987, on the architecture and design of an elementary functions processor. His main research interests are computer architecture, electronics, and VLSI design. Jean-Michel Muller was born in Grenoble, France, in 1961. He received the Engineer degree in 1983 and the Ph.D. degree in 1985, both from the Institut National Polytechnique de Grenoble, Grenoble, France. He is presently at the French Centre National de la Recherche Scientifique. His main research interests include design and analysis of hardware computation of elementary and arithmetic functions, computer arithmetic, and computer architecture.
    • N. Weste and K. Eshraghian, Principles of CMOS VLSI Design, A Systems Perspective. Reading, MA: Addison-Wesley, 1985. 1152 ieee transactions on computers, vol. c-36, no. 10, october 1987 Bertrand Hochet was born in France in 1961. He received the Engineer degree from Ecole Nationale Supèrieure d'Electronique et de Radioélectricité de Grenoble, Grenoble, France, in 1984, and the Ph.D. degree from Institut National Polytechnique de Grenoble, Grenoble, France, in January 1987, on the architecture and design of an elementary functions processor. His main research interests are computer architecture, electronics, and VLSI design. Jean-Michel Muller was born in Grenoble, France, in 1961. He received the Engineer degree in 1983 and the Ph.D. degree in 1985, both from the Institut National Polytechnique de Grenoble, Grenoble, France. He is presently at the French Centre National de la Recherche Scientifique. His main research interests include design and analysis of hardware computation of elementary and arithmetic functions, computer arithmetic, and computer architecture.
    • (1985) Principles of CMOS VLSI Design, A Systems Perspective.
    • Weste, N.1    Eshraghian, K.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.