Optimizing arithmetic elements for signal processing

Workshop on VLSI Signal Processing 1992

Volumn , Issue , 1992, Pages 91-100

  Callaway, Thomas K ^a   Swartzlander, Earl E ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; CMOS INTEGRATED CIRCUITS; ELECTRIC POWER UTILIZATION; VLSI CIRCUITS;

ARITHMETIC CIRCUIT; ARITHMETIC OPERATIONS; AVERAGE NUMBERS; DYNAMIC POWER CONSUMPTION; DYNAMIC POWER DISSIPATION; EXTENSIVE SIMULATIONS; LOGIC TRANSITIONS; SWITCHING CHARACTERISTICS;

DIGITAL SIGNAL PROCESSING;

EID: 0002846642     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSISP.1992.639176     Document Type: Conference Paper

References (12)

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