Design Challenges for New Application-Specific Processors

IEEE Design and Test of Computers

Volumn 17, Issue 2, 2000, Pages 40-50

  Jacome, Margarida F ^a,b   De Veciana, Gustavo ^a,b,c  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

^b The University of Texas at Austin   (United States)

^c UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0002731162     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.844333     Document Type: Article

References (8)

1. A. Aho, R. Sethi, and J. Ullman, Compilers: Principles, Techniques and Tools. Reading, Mass.: Addison-Wesley, 1988.
2. R. Anand, M.F. Jacome, and G. de Veciana, "Heuristic Tradeoffs Between Latency and Energy Consumption in Register Assignment," IEEE/ACM 8th Int'l Workshop Hardware/Software Codesign, May 2000.
3. F. Catthoor, S. Wuyack, E. Degreef, F. Balasa, L. Nachtergaele, and A. Vandecappelle, Custom Memory Management Methodology: Exploration of Memory Organization for Embedded Multimedia System Design. Kluwer Academic Publishers, 1998.
4. M. Jacome and G. de Veciana, "Lower Bound on Latency for VLIW ASIPs," Proc. ACM/IEEE Int'l Conf. Computer Aided Design (ICCAD), Nov. 1999.
5. M. Jacome, G. de Veciana, and C. Akturan, "Resource Constrained Dataflow Retiming Heuris-tics for VLIW ASIPs," 7th Int'l Workshop Hardware/Software Codesign, May 1999, pp. 12-16.
6. M. Jacome and H. Peixoto, "Design Reuse, How Far from Delivering the Promise," IEEE Design and Test of Computers, to appear.
7. P. Marwedel and G. Goossens, eds, Code Generation for Embedded Processors. Kluwer Academic Publishers, 1995.
8. S. Rixner, W. Dally, B. Khailany, P. Mattson, U. Kapasi, and J. Owens, "Register Organization for Media Processing," Proc. 26th Int'l Symp. High-Performance Computer Architecture, May 1999.