-
3
-
-
84938437922
-
Voltage punch-through and avalanche breakdown and their effect on the maximum operating voltages of junction transistors
-
H. Schenkel and H. Statz, “Voltage punch-through and avalanche breakdown and their effect on the maximum operating voltages of junction transistors,” in Proc. Nat. Elect. Conf., vol. 10, 1954, pp. 614–625.
-
(1954)
Proc. Nat. Elect. Conf.
, vol.10
, pp. 614-625
-
-
Schenkel, H.1
Statz, H.2
-
4
-
-
84944487711
-
Alloyed junction avalanche transistors
-
S. L. Miller and J. J. Ebers, “Alloyed junction avalanche transistors,” BellSyst. Tech. J., Vol. 34, pp. 883–902, 1955.
-
(1955)
BellSyst. Tech. J.
, vol.34
, pp. 883-902
-
-
Miller, S.L.1
Ebers, J.J.2
-
5
-
-
84937743109
-
Junction transistors with alpha greater than unity
-
H. Schenkel and H. Statz, “Junction transistors with alpha greater than unity,” Proc. IRE, vol. 44, pp. 360–371, 1956.
-
(1956)
Proc. IRE
, vol.44
, pp. 360-371
-
-
Schenkel, H.1
Statz, H.2
-
6
-
-
0024172243
-
A new static memory cell based on reverse base current (RBC) effect of bipolar transistor
-
K. Sakui, T. Hasegawa, T. Fue, S. Wantanabe, K. Ohuchi, and F. Masuoka, “A new static memory cell based on reverse base current (RBC) effect of bipolar transistor,” in IEDM Tech. Dig., 1988, pp. 44–47.
-
(1988)
IEDM Tech. Dig.
, pp. 44-47
-
-
Sakui, K.1
Hasegawa, T.2
Fue, T.3
Wantanabe, S.4
Ohuchi, K.5
Masuoka, F.6
-
7
-
-
0024684383
-
A new static memory cell based on the reverse base current effect of bipolar transistor
-
K. Sakui, T. Hasegawa, T. Fue, S. Wantanabe, K. Ohuchi, and F. Masuoka, “A new static memory cell based on the reverse base current effect of bipolar transistor,” IEEE Trans. Electron Devices, vol. 36, pp. 1215–1217, 1989.
-
(1989)
IEEE Trans. Electron Devices
, vol.36
, pp. 1215-1217
-
-
Sakui, K.1
Hasegawa, T.2
Fue, T.3
Wantanabe, S.4
Ohuchi, K.5
Masuoka, F.6
-
8
-
-
0014780722
-
An integral charge control model of bipolar transistors
-
H. K. Gummel and H. C. Poon, “An integral charge control model of bipolar transistors,” Bell Syst. Tech. J., vol. 49, pp. 827–852, 1970.
-
(1970)
Bell Syst. Tech. J.
, vol.49
, pp. 827-852
-
-
Gummel, H.K.1
Poon, H.C.2
-
10
-
-
0015279680
-
Modeling of avalanche effect in integral charge control model
-
H. C. Poon and J. C. Meckwood, “Modeling of avalanche effect in integral charge control model,” IEEE Trans. Electron Devices, vol. ED-19, pp. 90–97, 1972.
-
(1972)
IEEE Trans. Electron Devices
, vol.ED-19
, pp. 90-97
-
-
Poon, H.C.1
Meckwood, J.C.2
-
11
-
-
0001190370
-
Bipolar transistor modeling of avalanche generation for computer circuit simulation
-
R. W. Dutton, “Bipolar transistor modeling of avalanche generation for computer circuit simulation,” IEEE Trans. Electron Devices, vol. ED-22, pp. 334–338, 1975.
-
(1975)
IEEE Trans. Electron Devices
, vol.ED-22
, pp. 334-338
-
-
Dutton, R.W.1
-
12
-
-
0025379167
-
Carrier multiplication and avalanche breakdown in self-aligned bipolar transistors–DC measurements
-
M. Reisch, “Carrier multiplication and avalanche breakdown in self- aligned bipolar transistors—DC measurements,” Solid-State Electron., vol. 33, pp. 189–197, 1990.
-
(1990)
Solid-State Electron.
, vol.33
, pp. 189-197
-
-
Reisch, M.1
-
13
-
-
84927553170
-
Carrier generation and recombination in p-n junctions and p-n junction characteristics
-
C. T. Sah, R. N. Noyce, and W. Shockley, “Carrier generation and recombination in p-n junctions and p-n junction characteristics,” Proc. IRE, vol. 45, pp. 1228–1243, 1957.
-
(1957)
Proc. IRE
, vol.45
, pp. 1228-1243
-
-
Sah, C.T.1
Noyce, R.N.2
Shockley, W.3
-
15
-
-
0000155267
-
Ionization rates for holes and electrons in silicon
-
S. L. Miller, “Ionization rates for holes and electrons in silicon,” Phys. Rev., vol. 105, pp. 1246–1249, 1957.
-
(1957)
Phys. Rev.
, vol.105
, pp. 1246-1249
-
-
Miller, S.L.1
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