The block layout shortest loop design problem

IIE Transactions (Institute of Industrial Engineers)

Volumn 32, Issue 8, 2000, Pages 727-734

  Asef Vaziri, Ardavan ^a   Laporte, Gilbert ^b   Sriskandarajah, Chelliah ^c  

^a University of Southern California   (United States)

^b HEC MONTRÉAL   (Canada)

^c UNIVERSITY OF TEXAS AT DALLAS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0001510623     PISSN: 0740817X     EISSN: 15458830     Source Type: Journal    
DOI: 10.1080/07408170008967430     Document Type: Article

References (22)

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