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Volumn 60, Issue 16, 1992, Pages 2008-2010

Trapped-hole annealing and electron trapping in metal-oxide-semiconductor devices

Author keywords

[No Author keywords available]

Indexed keywords


EID: 0001480812     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.107126     Document Type: Article
Times cited : (30)

References (30)
  • 19
    • 84950579954 scopus 로고    scopus 로고
    • TSC measurements are not sensitive to the interface-trap charge which is in rapid communication with the underlying Si, as discussed in detail in Refs. 13 and 15.
  • 24
    • 84950579953 scopus 로고    scopus 로고
    • An attempt frequency of [formula omitted] was estimated from TSC runs in which the ramp rate was varied by up to a factor of 4, according to the procedure described in Ref. 18. In addition, [formula omitted] was added to the energy scale to correct for (Schottky) electric-field induced barrier lowering [S. L. Miller, D. M. Fleetwood, and P. J. McWhorter (unpublished)]. This corrects the energy scale of Ref. 13.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.