Low-power sequential circuit design using T flip-flops

International Journal of Electronics

Volumn 88, Issue 6, 2001, Pages 635-643

  Wu, Xunwei ^a   Pedram, Massoud ^b  

^a NINGBO UNIVERSITY   (China)

^b University of Southern California ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0001430167     PISSN: 00207217     EISSN: None     Source Type: Journal    
DOI: 10.1080/00207210110041506     Document Type: Article

References (12)

1. AFGHAHI, M., and YUAN, J., 1991, Double edge-triggered D-flip-flops for high-speed circuits. IEEE Journal of Solid-State Circuits, 26, 1168-1170.
2. BENINI, L., and DE MICHELI, G., 1995, Transformation and synthesis of FSMs for low power gated clock implementation. Proceedings of International Symposium on Low Power Design, Dana Point, pp. 21-26.
3. BENINI, L., SIEGEL, P., and DE MICHELLI, G., 1994, Saving power by synthesizing gated clocks for sequential circuits. IEEE Design & Test, Winter, 32-41.
4. FRIEDMAN, G., 1994, Clock distribution design in VLSI circuits: an overview. Proceedings of IEEE International Symposium on Circuits and Systems, San Jose, pp. 1475-1478.
5. GAGO, A., ESCANO, R, and HIDALGO, J. A., 1993, Reduced implementation of D-type DET flip-flops. IEEE Journal of Solid-State Circuits, 28, 400-402.
6. HOSSAIN, R., WRONSKI, L. D., and ALBICKI, A., 1994, Low power design using double edge triggered flip-flops. IEEE Transaction on VLSI Systems, 2, 261-265.
7. LU, S. L , and ERCEGOVAC, M., 1990, A novel CMOS imlementation of double-edge-triggered flip-flops IEEE Journal of Solid-State Circuits, 25, 1008-1010.
8. PEDRAM, M., WU, Q., and WU, X., 1998, A new design of double edge triggered flip-flops. Proceedings of Asia-Pacific Design Automation Conference, Yokohama, pp. 417-421.
9. RABAEY, J., and PEDRAM, M., 1996, Low Power Design Methodologies (Amsterdam: Kluwer).
10. TELLEZ, G. E., FARRAH, A., and SARRAFZADEH, M., 1995, Activity-driven clock design for low power circuits. Proceedings of IEEE International Conference on Computer Aided Design, San Jose, pp. 62-65.
11. UNGER, S. H., 1981, Double-edge-trisgered flip-flops. IEEE Transactions on Computers, 30, 447-451.
12. WESTE, N. H. E., and ESHRAGHIAN, K., 1993, Principles of CMOS VLSI Design. A System Perspective, 2nd edition (New York: Addison-Wesley).