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Volumn 22, Issue 6, 1975, Pages 2151-2156

Process optimization of radiation-hardened CMOS integrated circuits

Author keywords

[No Author keywords available]

Indexed keywords


EID: 0001399549     PISSN: 00189499     EISSN: 15581578     Source Type: Journal    
DOI: 10.1109/TNS.1975.4328096     Document Type: Article
Times cited : (158)

References (18)
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  • 2
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  • 5
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    • Design Optimization of Radiation-Hardened CMOS Integrated Circuits
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    • Fossum, J.G.1    Derbenwick, G.F.2    Gregory, B.L.3
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  • 7
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    • Chapter 2
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  • 10
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    • Radiation-Induced Space-Charge Buildup in MOS Structures
    • J. P. Mitchell, “Radiation-Induced Space-Charge Buildup in MOS Structures”, IEEE Trans. Elec. Dev. ED-14, 764 (1967).
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  • 11
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    • Holmes-Siedle, A.G.1    Zaininger, K.H.2
  • 13
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    • Vacuum Ultraviolet Radiation Effects in SiO2
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    • Powell, R.J.1    Derbenwick, G.F.2
  • 14
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    • Theory of the Carrier-Density Fluctuations in an IGFET Near Threshold
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.