A novel architecture for Walsh Hadamard transforms using distributed arithmetic principles

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 1, Issue , 2000, Pages 182-185

  Amira, A ^a   Bouridane, A ^a   Milligan, P ^a  

^a QUEEN'S UNIVERSITY BELFAST   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

IMAGE PROCESSING; WALSH TRANSFORMS;

DISTRIBUTED ARITHMETIC; DISTRIBUTED ARITHMETIC TECHNIQUES; FAST HADAMARD TRANSFORM; FPGA IMPLEMENTATIONS; IMAGE PROCESSING APPLICATIONS; NOVEL ARCHITECTURE; SYSTOLIC ARCHITECTURE; WALSH HADAMARD TRANSFORMS;

HADAMARD TRANSFORMS;

EID: 0000917618     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2000.911513     Document Type: Conference Paper

References (8)

1. Keshab K. Parhi, " VLSI digital signal processing systems design and implementation." John Wiley & Sons, Inc. USA, 1999.
2. Long-Wen Chang and Ming-Chang Wu, "A bit level systolic array for Walsh-Hadamard transforms." Signal Processing Vol31, pp 341-347, 1993
3. S.Y.KUNG, "VLSI Array Processors." PRENTICE HALL, USA, 1988.
4. D. Coppersmith et al "Hadamard transforms on multiply/add architecture, " IEEE Trans. Signal Processing, Vol 42, No 4" pp. 969-970, April 1994
5. M.H. Lee and M.Kaveh, "Fast Hadamard transform based on a simple matrix factorization." IEEE Trans. Acoust. Speech vol. ASSP-34, no.6, pp. 1666-1667, 1986.
6. K. P. Lim and A.B. Premkumar, "A Modular Approach to the Computation of Convolution Sum Using Distributed Arithmetic Principles." IEEE Trans. Circuits and Systems -II: Analog and Digital Signal Processing. Vol.46. No.1. January 1999.
7. T-S.Chang et al "New distributed arithmetic algorithm and its application to IDCT." IEE Proc on Circuit Devices. Syst, Vol 146. No4, August 1999.
8. "The Role of the FPGA-based Signal Processing" URL: http://www.xilinx.com.