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Volumn 14, Issue 6, 1995, Pages 750-765

Reconfiguration Techniques for a Single Scan Chain

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EID: 0000737675     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.387735     Document Type: Article
Times cited : (12)

References (15)
  • 2
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    • Reorganizing circuits to aid testability
    • Sept.
    • R. Gupta, R. Srinivasan, and M. A. Breuer, “Reorganizing circuits to aid testability,” IEEE Design & Test, vol. 8, no. 3, pp. 49–57, Sept. 1991.
    • (1991) IEEE Design & Test , vol.8 , Issue.3 , pp. 49-57
    • Gupta, R.1    Srinivasan, R.2    Breuer, M.A.3
  • 3
    • 0025416069 scopus 로고
    • Implementing macro test in silicon compiler design
    • Apr.
    • F. Beenker, R. Dekker, R. Stans, and M. Van der Star, “Implementing macro test in silicon compiler design,” IEEE Design & Test, vol. 7, no. 2, pp. 41–51, Apr. 1990.
    • (1990) IEEE Design & Test , vol.7 , Issue.2 , pp. 41-51
    • Beenker, F.1    Dekker, R.2    Stans, R.3    Van der Star, M.4
  • 4
    • 0026741375 scopus 로고
    • Selectable length partial scan: A method to reduce vector length
    • Nov.
    • S. P. Morley and R. A. Marlett, “Selectable length partial scan: A method to reduce vector length,” in Proc. Int. Test Conf., Nov. 1991, pp. 385–392.
    • (1991) Proc. Int. Test Conf. , pp. 385-392
    • Morley, S.P.1    Marlett, R.A.2
  • 5
    • 0026992437 scopus 로고
    • Configuration of a boundary scan chain for optimal testing of clusters of nonboundary scan devices
    • Nov.
    • Y. Choi and T. Jung, “Configuration of a boundary scan chain for optimal testing of clusters of nonboundary scan devices,” in Proc. Int. Conf. Computer-Aided Design, Nov. 1992., pp. 13–16
    • (1992) Proc. Int. Conf. Computer-Aided Design , pp. 13-16
    • Choi, Y.1    Jung, T.2
  • 8
    • 0027663733 scopus 로고
    • Optimal configuring of multiple scan chains
    • Sept.
    • S. Narayanan, R. Gupta, and M. A. Breuer, “Optimal configuring of multiple scan chains,” IEEE Trans. Comput., vol. 42, no. 9, pp. 1121–1131, Sept. 1993.
    • (1993) IEEE Trans. Comput. , vol.42 , Issue.9 , pp. 1121-1131
    • Narayanan, S.1    Gupta, R.2    Breuer, M.A.3
  • 11
    • 0001253255 scopus 로고
    • Optimal sequencing of a single machine subject to precedence constraints
    • Jan.
    • E. L. Lawler, “Optimal sequencing of a single machine subject to precedence constraints,” Management Sci., vol. 19, no. 5, pp. 544–546, Jan. 1973.
    • (1973) Management Sci. , vol.19 , Issue.5 , pp. 544-546
    • Lawler, E.L.1
  • 13
    • 0024913805 scopus 로고
    • Combinational profiles of sequential benchmark circuits
    • May
    • F. Brglez, D. Bryan, and K. Kozminski, “Combinational profiles of sequential benchmark circuits,” in Proc. Int. Symp. Circuits Syst., May 1989, pp. 1929–1934.
    • (1989) Proc. Int. Symp. Circuits Syst. , pp. 1929-1934
    • Brglez, F.1    Bryan, D.2    Kozminski, K.3
  • 15
    • 0025417241 scopus 로고
    • The BALLAST methodology for structured partial scan design
    • Apr.
    • R. Gupta, R. Gupta, and M. A. Breuer, “The BALLAST methodology for structured partial scan design,” IEEE Trans. Computers, vol. 39, no. 4, pp. 538–543, Apr. 1990.
    • (1990) IEEE Trans. Computers , vol.39 , Issue.4 , pp. 538-543
    • Gupta, R.1    Gupta, R.2    Breuer, M.A.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.