Noise-tolerant dynamic circuit design

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 1999, Pages

  Wang, Lei ^a   Shanbhag, Naresh R ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ENERGY EFFICIENCY; LOGIC GATES; NAND CIRCUITS; SPURIOUS SIGNAL NOISE;

AVERAGE NOISE THRESHOLD ENERGY; NOISE IMMUNITY; NOISE TOLERANT DYNAMIC CIRCUIT;

VLSI CIRCUITS;

EID: 0000401912     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (14)